1. Field of the Invention
The present invention generally relates to a driver circuit for use in a high-speed serial communications system, and more particularly to a driver circuit capable of reducing power consumption by effectively changing an inner resistance in accordance with an input data signal.
2. Discussion of the Background
Many electronic products are equipped with a high speed interface to allow high speed communication with other products. Accordingly, systems that use a high-speed serial communication system have been developed in recent years. A currently available high-speed serial communication to realize a high-speed data transmission is, for example, a low-voltage differential signal transmission (LVDS) system using a differential voltage signal of low amplitude, or a current mode logic (CML) system.
FIG. 1 illustrates a circuit diagram of an exemplary transmitter driver circuit 101 employed in a background high-speed serial communications system using the CML system. The background high-speed serial communications system produces a voltage amplitude conforming to a specific standard by applying a predetermined current to a terminating resistance which is provided to a reception end of a transmission line connected to the transmitter driver circuit 101. For example, the background high-speed serial communications system provided for a serial ATA (Advanced Technology Attachment) needs to produce a voltage amplitude of 250 mV. As another example, the high-speed serial communications system provided for PCI-Express needs to produce a voltage amplitude of 330 mV.
This type of background high-speed serial communications system is provided with a pre-emphasis function which increases a voltage amplitude at a transmission of predetermined data in contemplation of a damping characteristic of a signal in a transmission line. FIG. 2 illustrates a circuit diagram of an exemplary transmitter driver circuit 102 having an emphasis function. In FIG. 2, the transmitter driver circuit 102 activates both constant-current generators Ic101 and Ic102 at a time of pre-emphasis but activates only the constant-current generator Ic101 at a time other than the pre-emphasis.
The background high-speed serial communications system is provided with an output driver which typically includes a first driver and a second driver. The first driver includes a signal input end and a signal output end. The first driver has a specific output impedance predefined in accordance with a characteristic impedance of a transmission line of a signal transmission media. The second driver is connected to the first driver in parallel and is configured to receive and to amplify a signal in response to an input control signal.
The background high-speed serial communications system is further provided with a differential data driver circuit which typically includes a first pre-drive circuit, a delay circuit, a second pre-drive circuit, and an output driver circuit. The first pre-drive circuit receives differential data. The delay circuit receives a differential data signal and is used for pre-emphasis in which a lag time of the differential data signal is variable according to a control signal. The second pre-drive circuit receives an output signal of the delay circuit. The output driver circuit outputs a drive current having a pre-emphasis waveform equivalent to a difference signal representing a difference between output signals of the first pre-drive circuit and the second pre-drive circuit.